Post Silicon Validation Engineer
THE ROLE:
Technical, hands-on engineer responsible for Datacenter Server SoC Post-Silicon features validation and enablement at the silicon SoC level up through BIOS, system firmware, and OS levels on AMD Server products. This individual will be primarily responsible for interfacing with silicon, firmware, and platform design groups to develop and execute validation test plans for Datacenter Server SoC products during emulation and post-silicon bring-up / validation, to debug SoC feature issues, and to run and maintain validation infrastructure.
KEY RESPONSIBILITIES:
• Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products
• Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup)
• Test interactions between various SoC features using validation infrastructure
• Debug and drive root-cause analysis for Security related issues
• Collaborate with cross-functional teams in developing tools to improve SoC validation and debug
• Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process
REQUIRED EXPERIENCE:
• Experience with PC architecture and microprocessor cores
• Understanding of modern x86 microprocessor architecture and Server platform architecture is highly desired
• Experience developing validation methodologies and infrastructure
• Test plan and test development experience
• Participated in silicon bring up and debug, support to internal engineering teams
• Able to execute and drive success of programs with multiple projects on the go
• Debug skills at both SoC and system level
• Familiarity with programming / scripting language (C/C++, Python, Perl, ...)
• Working knowledge of Server OSes (Linux, Windows)
• Must be a self-starting team player with excellent communication skills who can work with minimal guidance
• Forward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement
• Strong verbal and written English communication skills
PREFERRED EXPERIENCE:
• Working knowledge of lab equipment such as oscilloscopes, logic analyzers and protocol analyzers
• Hypervisor experience is a plus with regards to security encryption in virtualized environments
• Self-organizing and the ability multitask based on priorities
ACADEMIC CREDENTIALS:
• Bachelor's degree or higher in Electrical/Computer Engineering or Electronics / Computer Science related with a minimum 2-5 years of experience in SoC validation and debug.
Due to federal security clearance requirements, applicant must be a United States Citizen or Permanent Resident We cannot sponsor candidates !
- provided by Dice