Synthesis Engineer opportunity in Saratoga, CA

Synthesis Engineer Full Time opportunity in Saratoga, CA We are seeking a Synthesis Engineer to help define and implement our industry-leading Networking IC. If you're a highly motivated self-starter eager to solve real-world problems, this is a unique opportunity to shape the future of AI Networking. As part of the Design Group, you will be responsible for defining, specifying, architecting, executing, and productizing cutting-edge Networking devices. Responsibilities Define and maintain the synthesis flow-including logic and physical synthesis. Develop and manage synthesis design constraints (e.g., SDC). Design and architect top-level and block-level floorplans for multi-chiplet systems and interposers. Collaborate with micro-architects on feasibility studies and performance, power, and area (PPA) tradeoffs. Work with the Design and DFT teams on scan insertion and synthesis implementation steps. Partner with Design Verification to support equivalence checking and functional sign-off. Assist in defining and integrating low-power optimization strategies into the synthesis flow. Qualifications Master's or Bachelor's degree in Electrical Engineering. Minimum 15+ years of relevant experience. Prior experience with multiple tapeouts in deep sub-micron nodes (7nm or below) is required. Proficiency with Cadence Innovus/Genus or Synopsys Fusion Compiler. Strong scripting skills in Unix shell, Perl, Python, and TCL. Deep understanding of CDC/RDC flows and equivalence checking. Familiarity with CAD tools and logic/physical design principles for low-power, high-performance chips. Knowledge of foundation libraries, VT tradeoffs, multi-track library usage, synchronizers, and lock-up latches. Exposure to datapath synthesis, memory compilers, and power optimization. Knowledge of Verilog and SystemVerilog. Understanding of device physics and deep sub-micron technologies. Experience with EMIB architectures and chip-to-chip bridging is a plus.