Job Overview: Are you passionate about shaping the future of chip design? In the Solutions Engineering group at Arm, we offer the outstanding opportunity for an experienced Power Analysis Engineer to join our successful team in a dynamic and diverse role! Arm is establishing a team to develop best-in-class silicon platforms based on Arm's IP Compute Subsystem solutions, addressing markets such as premium mobile, infrastructure, and automotive. Arm's ambition is to demonstrate efficient performance by architecting, designing, implementing, and fabricating pioneering silicon test chips using the latest SoC process nodes and packaging technologies. This is an exciting and unique initiative, where we are driving how the next generation of leading compute devices are built across the industry. Join Arm to be part of the solution! Responsibilities: You will join a highly focused group where we analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools. Analyze the power efficiency of SoC design features from early estimation to final product validation. Developing and running RTL simulator and emulator based workloads to analyze the power of the hardware design. Taking pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis. Analysis engineers collaborate with multiple teams from SoC Architecture, Performance Analysis, Microarchitecture Design, to Physical design to develop and analyze real software use-cases and the physical hardware. Building relevant metrics along with visualization to demonstrate the hardware power signature and capabilities of the compute subsystems. Reviewing the quality and accuracy of data produced by the latest EDA power analysis tool flows. Continuously innovating by improving the power analysis methodologies used by the team. Required Skills and Experience : We are seeking experienced engineers for a multi-disciplinary role in power analysis. Ideal candidates have past experience in power analysis or are motivated engineers with valuable transferable skills from design, implementation, or verification backgrounds. Skilled in performing power modeling or pre-silicon power analysis flows. Experience with low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention. Ability to understand and balance trade-offs between power, performance, and area. Familiar with developing RTL using Verilog, System Verilog, or VHDL. Knowledge of Physical Implementation flow from RTL through Synthesis, Place & Route to STA. "Nice To Have" Skills and Experience : A background in development based on Arm processor based SoC system designs. A Bachelor's (BS), Master's (MS/MSc), or equivalent degree in Electronics, Electrical, or Computer Engineering. Candidates with other degrees will be considered if they have relevant work experience. Development or analysis of CPU or Graphics benchmarks for PPA analysis. Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc) Background in running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc) Good understanding of the concepts and tools related to synthesis, place & route, clock tree synthesis, constraint development, timing closure. (e.g. Innovus, Tempus, etc) In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
04/26/2024
Full time
Job Overview: Are you passionate about shaping the future of chip design? In the Solutions Engineering group at Arm, we offer the outstanding opportunity for an experienced Power Analysis Engineer to join our successful team in a dynamic and diverse role! Arm is establishing a team to develop best-in-class silicon platforms based on Arm's IP Compute Subsystem solutions, addressing markets such as premium mobile, infrastructure, and automotive. Arm's ambition is to demonstrate efficient performance by architecting, designing, implementing, and fabricating pioneering silicon test chips using the latest SoC process nodes and packaging technologies. This is an exciting and unique initiative, where we are driving how the next generation of leading compute devices are built across the industry. Join Arm to be part of the solution! Responsibilities: You will join a highly focused group where we analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools. Analyze the power efficiency of SoC design features from early estimation to final product validation. Developing and running RTL simulator and emulator based workloads to analyze the power of the hardware design. Taking pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis. Analysis engineers collaborate with multiple teams from SoC Architecture, Performance Analysis, Microarchitecture Design, to Physical design to develop and analyze real software use-cases and the physical hardware. Building relevant metrics along with visualization to demonstrate the hardware power signature and capabilities of the compute subsystems. Reviewing the quality and accuracy of data produced by the latest EDA power analysis tool flows. Continuously innovating by improving the power analysis methodologies used by the team. Required Skills and Experience : We are seeking experienced engineers for a multi-disciplinary role in power analysis. Ideal candidates have past experience in power analysis or are motivated engineers with valuable transferable skills from design, implementation, or verification backgrounds. Skilled in performing power modeling or pre-silicon power analysis flows. Experience with low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention. Ability to understand and balance trade-offs between power, performance, and area. Familiar with developing RTL using Verilog, System Verilog, or VHDL. Knowledge of Physical Implementation flow from RTL through Synthesis, Place & Route to STA. "Nice To Have" Skills and Experience : A background in development based on Arm processor based SoC system designs. A Bachelor's (BS), Master's (MS/MSc), or equivalent degree in Electronics, Electrical, or Computer Engineering. Candidates with other degrees will be considered if they have relevant work experience. Development or analysis of CPU or Graphics benchmarks for PPA analysis. Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc) Background in running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc) Good understanding of the concepts and tools related to synthesis, place & route, clock tree synthesis, constraint development, timing closure. (e.g. Innovus, Tempus, etc) In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
Job Overview: Power Analysis Lead is a technical lead role responsible for estimating, analyzing and optimizing high-volume, sophisticated, SoC platforms on groundbreaking nodes across multiple market segments including mobile, automotive, datacenter and networking, and IoT. This position plays a meaningful role in the development of production-quality silicon with outstanding performance and power efficiency, both in partnership with Arm partners and producing Arm development silicon! Responsibilities: You will join a highly focused group to define and lead activities to analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools. Lead a team focused on pre-silicon power analysis of SoC product features, from early estimation to final product validation. Work proactively across Arm's SoC and IP product teams to coordinate the power measurement and optimization of the SoC design. Collaborate with Architecture team to develop power modeling and estimation of world-leading SoCs. Drive activities for pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis. Collaborate with post-silicon characterization team to correlate pre-silicon estimates. Defining relevant metrics, visualizations and reports for analyzing power. Driving a culture of innovation in the team to improve power analysis methodologies. Required Skills and Experience : We are seeking strong technical leadership, with ability to develop accurate project plans involving multiple teams. Expertise in RTL and Netlist based power analysis flows. Expert knowledge of ASIC design dependencies on power efficiency including technology node, mixed Vt design, standard cell and memory library selection, voltage and power domain partitioning. Shown experience driving multiple projects and supporting junior engineers. Good knowledge of software use-cases and workloads and how they affect the hardware design power. Good understanding of ASIC physical design flows and simulation/emulation flows. "Nice To Have" Skills and Experience : Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc) Experience running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc) Detailed knowledge of low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention. Python for automation and modeling. SoC use-case power budget decomposition to IP power budget. Development of SoC benchmarks for power and performance analysis. Experience with correlation between pre and post silicon power. Excellent presentation, interpersonal and communication skills. Able to present at technical content inside and outside of Arm. In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together! These behaviors are assessed as part of the hiring process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
04/26/2024
Full time
Job Overview: Power Analysis Lead is a technical lead role responsible for estimating, analyzing and optimizing high-volume, sophisticated, SoC platforms on groundbreaking nodes across multiple market segments including mobile, automotive, datacenter and networking, and IoT. This position plays a meaningful role in the development of production-quality silicon with outstanding performance and power efficiency, both in partnership with Arm partners and producing Arm development silicon! Responsibilities: You will join a highly focused group to define and lead activities to analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools. Lead a team focused on pre-silicon power analysis of SoC product features, from early estimation to final product validation. Work proactively across Arm's SoC and IP product teams to coordinate the power measurement and optimization of the SoC design. Collaborate with Architecture team to develop power modeling and estimation of world-leading SoCs. Drive activities for pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis. Collaborate with post-silicon characterization team to correlate pre-silicon estimates. Defining relevant metrics, visualizations and reports for analyzing power. Driving a culture of innovation in the team to improve power analysis methodologies. Required Skills and Experience : We are seeking strong technical leadership, with ability to develop accurate project plans involving multiple teams. Expertise in RTL and Netlist based power analysis flows. Expert knowledge of ASIC design dependencies on power efficiency including technology node, mixed Vt design, standard cell and memory library selection, voltage and power domain partitioning. Shown experience driving multiple projects and supporting junior engineers. Good knowledge of software use-cases and workloads and how they affect the hardware design power. Good understanding of ASIC physical design flows and simulation/emulation flows. "Nice To Have" Skills and Experience : Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc) Experience running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc) Detailed knowledge of low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention. Python for automation and modeling. SoC use-case power budget decomposition to IP power budget. Development of SoC benchmarks for power and performance analysis. Experience with correlation between pre and post silicon power. Excellent presentation, interpersonal and communication skills. Able to present at technical content inside and outside of Arm. In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together! These behaviors are assessed as part of the hiring process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
Job Overview: Arm's CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE. Responsibilities: Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Staff DFT Engineer with proven track record in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master's degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field "Nice To Have" Skills and Experience : Familiarity with IEEE 1149, 1500, 1687, 1838 Synthesis & Static Timing Analysis Familiarity with SoC style architectures including multi-clock domain and low power design practices. Validated understanding of Siemens DFT tools Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug Experience with 2.5D and 3D test Ability to work both collaboratively on a team and independently Hard-working and excellent time management skills with an ability to multi-task An upbeat demeanor to working on exciting projects on the cutting edge of technology Good analytical and debug skills with a "figure it out" mentality Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools Salary Range: From: $ 176,375.00 To $228,250.00 We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the value you bring to Arm. Salary is only one component of Arm's offering. The total reward package will be discussed with candidates during the selection process. In Return At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding. These behaviors are assessed as part of the recruitment process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
04/26/2024
Full time
Job Overview: Arm's CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE. Responsibilities: Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Staff DFT Engineer with proven track record in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master's degree or equivalent experience in Electronic Engineering, Computer Engineering, or a related field "Nice To Have" Skills and Experience : Familiarity with IEEE 1149, 1500, 1687, 1838 Synthesis & Static Timing Analysis Familiarity with SoC style architectures including multi-clock domain and low power design practices. Validated understanding of Siemens DFT tools Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug Experience with 2.5D and 3D test Ability to work both collaboratively on a team and independently Hard-working and excellent time management skills with an ability to multi-task An upbeat demeanor to working on exciting projects on the cutting edge of technology Good analytical and debug skills with a "figure it out" mentality Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools Salary Range: From: $ 176,375.00 To $228,250.00 We value people as individuals and our dedication is to reward people competitively and equitably for the work they do and the value you bring to Arm. Salary is only one component of Arm's offering. The total reward package will be discussed with candidates during the selection process. In Return At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding. These behaviors are assessed as part of the recruitment process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
Job Overview: Arm's CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE. Responsibilities: Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Staff DFT Engineer with proven track record in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master's degree in Electronic Engineering, Computer Engineering, or a related field "Nice To Have" Skills and Experience : Familiarity with IEEE 1149, 1500, 1687, 1838 Synthesis & Static Timing Analysis Familiarity with SoC style architectures including multi-clock domain and low power design practices. Validated understanding of Siemens DFT tools Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug Experience with 2.5D and 3D test Ability to work both collaboratively on a team and independently Hard-working and excellent time management skills with an ability to multi-task An upbeat demeanor to working on exciting projects on the cutting edge of technology Good analytical and debug skills with a "figure it out" mentality Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools In Return: At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding. Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
04/26/2024
Full time
Job Overview: Arm's CE-Systems DFT team implements DFT for test chips and hard macros to prove out Arm soft IP power, performance, area, and functionality within the context of an SoC using the latest DFT and process technologies. The DFT team works closely with RTL, Verification, Physical Implementation, and Test engineering teams throughout the life cycle of a project, from an early investigation stage all the way through tape-out and silicon test/characterization on ATE. Responsibilities: Architect, implement, and validate innovative DFT techniques on test chips as well as hard macros. Insert DFT logic into SoC style designs at the RTL level and at the Synthesis gate level, validate all features, and generate ATE targeted test patterns to be run on silicon. Work closely with front-end design and verification teams on DFT RTL level insertion, back-end synthesis, place-and-route, and static-timing-analysis teams on gate level insertion and timing closure, and Test and Debug teams on silicon characterization and validation. Required Skills and Experience : This role is for a Staff DFT Engineer with proven track record in Design for Test Experience coding Verilog RTL, TCL and/or Perl Proficient in Unix/Linux environments Core DFT skills considered for this position should include some of the following: Scan compression and insertion, Memory BIST and repair scheme implementation, Logic BIST, JTAG/IJTAG, at-speed test, ATPG, fault simulation, back-annotated gate level verification, silicon debug, memory and scan diagnostics Bachelors or Master's degree in Electronic Engineering, Computer Engineering, or a related field "Nice To Have" Skills and Experience : Familiarity with IEEE 1149, 1500, 1687, 1838 Synthesis & Static Timing Analysis Familiarity with SoC style architectures including multi-clock domain and low power design practices. Validated understanding of Siemens DFT tools Familiarity with Arm IP like the following: Cortex CPUs, Mali GPUs, AMBA protocols, CoreLink interconnects, CoreSight debug Experience with 2.5D and 3D test Ability to work both collaboratively on a team and independently Hard-working and excellent time management skills with an ability to multi-task An upbeat demeanor to working on exciting projects on the cutting edge of technology Good analytical and debug skills with a "figure it out" mentality Experience with Siemens, Cadence, and/or Synopsys DFT and simulation tools In Return: At Arm, we are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together to defy ordinary and shape outstanding. Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Director of Software Enablement and Support THE ROLE: This role demands a seasoned professional with strong technical expertise in server platforms and an adept ability to navigate the complex interplay between hardware and software in AI and HPC infrastructure, especially suitable for large language models (LLMs). This role is expressly defined to ensure our customers are enabled with the right AMD HW/SW building blocks and the right guidance for efficiently setting up, configuring, and tuning these building blocks to unleash the leading performance and power performance of an Instinct-based solution. This position will also oversee our ongoing software support and maintenance, ensuring that our customers are kept up to date with the latest optimizations, and any quality concerns are addressed with any element of the solution always being a top priority. This position demands a deep understanding of data center platform interdependencies and technology strategy with both HPC and AI knowledge desired. Furthermore, a key aspect of this role is ensuring that emerging software best practices for AI & HPC consistently inform and influence our engagement strategies, future product definitions, and any associated plans of record (POR) changes. This role is critical to enabling our rapid scaling and broad customer adoption both in enterprise and cloud. It requires considering all aspects of system HW/FW/SW to ensure our AMD-based solutions deliver more value than our competition, even in chassis/rack infrastructure explicitly built for them. THE PERSON: We are seeking an experienced and dedicated Director to join our Systems Designs Engineering team. In this critical role, you will drive the technical vision, platform scaling strategy, and systems enablement guidance for our Instinct products and solutions. You will have an ongoing responsibility for analyzing complex system requirements and specifications across a wide spectrum of technologies and will ensure we holistically and optimally support an appropriate stack spanning silicon, platform HW/SW, and usages. Just as important, you will be the leader at the epicenter of all software support and maintenance with an ongoing execution task of resolving customer software tickets and proactively pushing the right optimizations for power/performance, security, and quality. By facilitating a close collaboration with our HPC Applications Tuning and our AI Software Solutions teams and integrating their insights into your work, and by never compromising on our quality promise, you will be key to shaping future Instinct products that are quickly adopted, stand out in the market, and provide unrivaled value to our customers. KEY RESPONSIBILITIES: Refine our L1/L2/L3 processes for supporting the successful bring-up of HPC and AI frameworks and models in partnership with our ODMs/OEMs in support of our end clients. Provide L2 software support and maintenance to all Instinct products through end of life. Oversee the development and application of tools and new methodologies required to support clients adopting our Instinct-based solutions. Provide guidance and support to our teams and customers as we help them adapt their HPC and AI servers developed with our competition's GPU solution to our MI300 product. Provide strategic oversight for our AMD participation in industry consortiums, driving forward key HPC initiatives. Drive future product architecture influence, leveraging insights from across the organization and industry trends. PREFERRED EXPERIENCE: Good understanding of the DCGPU AI and HPC SW stack from low-level firmware, high-level frameworks and apps, and DevOps. Strong relationships with customers, engaging in dialogue to understand their needs and aligning our product development accordingly. Evidence that an individual will do well in a heavy execution-focused environment - the ability to balance the tactical, urgent customer issue support with the more strategic enablement improvement required for scale. Ability to help teams triage system-level issues down to the most likely hardware or software subsystem, enabling quick root cause and resolution. Experience with bare-metal and virtualized environments as well as proficiency in utilizing containers, such as Docker, for seamless deployment of established software recipes to end clients. Experience guiding global teams on optimizing software in the AI and/or HPC space. Expertise in server space of leveraging strong technical capabilities and leading-edge technologies to ensure our customer needs are met. Technical oversight of the co-engineering of hardware development and validation, ensuring robust and reliable HPC solutions. Work very closely with the AMD HPC and Server validation and platform engineering teams in NA and Penang on these engagements. Engage with third-party software and firmware partners (ISVs, OSVs, IBVs) to ensure optimal software compatibility and performance. Previous roles that leverage a team's technical expertise and customer insights to help shape future product direction so that products are more easily adopted by a larger set of customers across the broader AI market. ACADEMIC CREDENTIALS: BS in Electrical Engineering is required. An advanced Engineering degree (MS or Ph.D.) would be an added plus. LOCATION: Austin TX Preferred At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
04/26/2024
Full time
WHAT YOU DO AT AMD CHANGES EVERYTHING We care deeply about transforming lives with AMD technology to enrich our industry, our communities, and the world. Our mission is to build great products that accelerate next-generation computing experiences - the building blocks for the data center, artificial intelligence, PCs, gaming and embedded. Underpinning our mission is the AMD culture. We push the limits of innovation to solve the world's most important challenges. We strive for execution excellence while being direct, humble, collaborative, and inclusive of diverse perspectives. AMD together we advance_ Director of Software Enablement and Support THE ROLE: This role demands a seasoned professional with strong technical expertise in server platforms and an adept ability to navigate the complex interplay between hardware and software in AI and HPC infrastructure, especially suitable for large language models (LLMs). This role is expressly defined to ensure our customers are enabled with the right AMD HW/SW building blocks and the right guidance for efficiently setting up, configuring, and tuning these building blocks to unleash the leading performance and power performance of an Instinct-based solution. This position will also oversee our ongoing software support and maintenance, ensuring that our customers are kept up to date with the latest optimizations, and any quality concerns are addressed with any element of the solution always being a top priority. This position demands a deep understanding of data center platform interdependencies and technology strategy with both HPC and AI knowledge desired. Furthermore, a key aspect of this role is ensuring that emerging software best practices for AI & HPC consistently inform and influence our engagement strategies, future product definitions, and any associated plans of record (POR) changes. This role is critical to enabling our rapid scaling and broad customer adoption both in enterprise and cloud. It requires considering all aspects of system HW/FW/SW to ensure our AMD-based solutions deliver more value than our competition, even in chassis/rack infrastructure explicitly built for them. THE PERSON: We are seeking an experienced and dedicated Director to join our Systems Designs Engineering team. In this critical role, you will drive the technical vision, platform scaling strategy, and systems enablement guidance for our Instinct products and solutions. You will have an ongoing responsibility for analyzing complex system requirements and specifications across a wide spectrum of technologies and will ensure we holistically and optimally support an appropriate stack spanning silicon, platform HW/SW, and usages. Just as important, you will be the leader at the epicenter of all software support and maintenance with an ongoing execution task of resolving customer software tickets and proactively pushing the right optimizations for power/performance, security, and quality. By facilitating a close collaboration with our HPC Applications Tuning and our AI Software Solutions teams and integrating their insights into your work, and by never compromising on our quality promise, you will be key to shaping future Instinct products that are quickly adopted, stand out in the market, and provide unrivaled value to our customers. KEY RESPONSIBILITIES: Refine our L1/L2/L3 processes for supporting the successful bring-up of HPC and AI frameworks and models in partnership with our ODMs/OEMs in support of our end clients. Provide L2 software support and maintenance to all Instinct products through end of life. Oversee the development and application of tools and new methodologies required to support clients adopting our Instinct-based solutions. Provide guidance and support to our teams and customers as we help them adapt their HPC and AI servers developed with our competition's GPU solution to our MI300 product. Provide strategic oversight for our AMD participation in industry consortiums, driving forward key HPC initiatives. Drive future product architecture influence, leveraging insights from across the organization and industry trends. PREFERRED EXPERIENCE: Good understanding of the DCGPU AI and HPC SW stack from low-level firmware, high-level frameworks and apps, and DevOps. Strong relationships with customers, engaging in dialogue to understand their needs and aligning our product development accordingly. Evidence that an individual will do well in a heavy execution-focused environment - the ability to balance the tactical, urgent customer issue support with the more strategic enablement improvement required for scale. Ability to help teams triage system-level issues down to the most likely hardware or software subsystem, enabling quick root cause and resolution. Experience with bare-metal and virtualized environments as well as proficiency in utilizing containers, such as Docker, for seamless deployment of established software recipes to end clients. Experience guiding global teams on optimizing software in the AI and/or HPC space. Expertise in server space of leveraging strong technical capabilities and leading-edge technologies to ensure our customer needs are met. Technical oversight of the co-engineering of hardware development and validation, ensuring robust and reliable HPC solutions. Work very closely with the AMD HPC and Server validation and platform engineering teams in NA and Penang on these engagements. Engage with third-party software and firmware partners (ISVs, OSVs, IBVs) to ensure optimal software compatibility and performance. Previous roles that leverage a team's technical expertise and customer insights to help shape future product direction so that products are more easily adopted by a larger set of customers across the broader AI market. ACADEMIC CREDENTIALS: BS in Electrical Engineering is required. An advanced Engineering degree (MS or Ph.D.) would be an added plus. LOCATION: Austin TX Preferred At AMD, your base pay is one part of your total rewards package. Your base pay will depend on where your skills, qualifications, experience, and location fit into the hiring range for the position. You may be eligible for incentives based upon your role such as either an annual bonus or sales incentive. Many AMD employees have the opportunity to own shares of AMD stock, as well as a discount when purchasing AMD stock if voluntarily participating in AMD's Employee Stock Purchase Plan. You'll also be eligible for competitive benefits described in more detail here. AMD does not accept unsolicited resumes from headhunters, recruitment agencies, or fee-based recruitment services. AMD and its subsidiaries are equal opportunity, inclusive employers and will consider all applicants without regard to age, ancestry, color, marital status, medical condition, mental or physical disability, national origin, race, religion, political and/or third-party affiliation, sex, pregnancy, sexual orientation, gender identity, military or veteran status, or any other characteristic protected by law. We encourage applications from all qualified candidates and will accommodate applicants' needs under the respective laws throughout all stages of the recruitment and selection process.
Job Overview: Are you passionate about shaping the future of chip design? In the Solutions Engineering group at Arm, we offer the outstanding opportunity for an experienced Power Analysis Engineer to join our successful team in a dynamic and diverse role! Arm is establishing a team to develop best-in-class silicon platforms based on Arm's IP Compute Subsystem solutions, addressing markets such as premium mobile, infrastructure, and automotive. Arm's ambition is to demonstrate efficient performance by architecting, designing, implementing, and fabricating pioneering silicon test chips using the latest SoC process nodes and packaging technologies. This is an exciting and unique initiative, where we are driving how the next generation of leading compute devices are built across the industry. Join Arm to be part of the solution! Responsibilities: You will join a highly focused group where we analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools. Analyze the power efficiency of SoC design features from early estimation to final product validation. Developing and running RTL simulator and emulator based workloads to analyze the power of the hardware design. Taking pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis. Analysis engineers collaborate with multiple teams from SoC Architecture, Performance Analysis, Microarchitecture Design, to Physical design to develop and analyze real software use-cases and the physical hardware. Building relevant metrics along with visualization to demonstrate the hardware power signature and capabilities of the compute subsystems. Reviewing the quality and accuracy of data produced by the latest EDA power analysis tool flows. Continuously innovating by improving the power analysis methodologies used by the team. Required Skills and Experience : We are seeking experienced engineers for a multi-disciplinary role in power analysis. Ideal candidates have past experience in power analysis or are motivated engineers with valuable transferable skills from design, implementation, or verification backgrounds. Skilled in performing power modeling or pre-silicon power analysis flows. Experience with low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention. Ability to understand and balance trade-offs between power, performance, and area. Familiar with developing RTL using Verilog, System Verilog, or VHDL. Knowledge of Physical Implementation flow from RTL through Synthesis, Place & Route to STA. "Nice To Have" Skills and Experience : A background in development based on Arm processor based SoC system designs. A Bachelor's (BS), Master's (MS/MSc), or equivalent degree in Electronics, Electrical, or Computer Engineering. Candidates with other degrees will be considered if they have relevant work experience. Development or analysis of CPU or Graphics benchmarks for PPA analysis. Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc) Background in running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc) Good understanding of the concepts and tools related to synthesis, place & route, clock tree synthesis, constraint development, timing closure. (e.g. Innovus, Tempus, etc) In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
04/25/2024
Full time
Job Overview: Are you passionate about shaping the future of chip design? In the Solutions Engineering group at Arm, we offer the outstanding opportunity for an experienced Power Analysis Engineer to join our successful team in a dynamic and diverse role! Arm is establishing a team to develop best-in-class silicon platforms based on Arm's IP Compute Subsystem solutions, addressing markets such as premium mobile, infrastructure, and automotive. Arm's ambition is to demonstrate efficient performance by architecting, designing, implementing, and fabricating pioneering silicon test chips using the latest SoC process nodes and packaging technologies. This is an exciting and unique initiative, where we are driving how the next generation of leading compute devices are built across the industry. Join Arm to be part of the solution! Responsibilities: You will join a highly focused group where we analyze and optimize the power of our next generation compute solutions using innovative technologies, methodologies and tools. Analyze the power efficiency of SoC design features from early estimation to final product validation. Developing and running RTL simulator and emulator based workloads to analyze the power of the hardware design. Taking pre-silicon design power measurements throughout the SoC development cycle from early modeling, RTL analysis, to in-depth timing annotated netlist analysis. Analysis engineers collaborate with multiple teams from SoC Architecture, Performance Analysis, Microarchitecture Design, to Physical design to develop and analyze real software use-cases and the physical hardware. Building relevant metrics along with visualization to demonstrate the hardware power signature and capabilities of the compute subsystems. Reviewing the quality and accuracy of data produced by the latest EDA power analysis tool flows. Continuously innovating by improving the power analysis methodologies used by the team. Required Skills and Experience : We are seeking experienced engineers for a multi-disciplinary role in power analysis. Ideal candidates have past experience in power analysis or are motivated engineers with valuable transferable skills from design, implementation, or verification backgrounds. Skilled in performing power modeling or pre-silicon power analysis flows. Experience with low power design features and techniques, including clock and power gating, voltage/frequency scaling, memory/logic retention. Ability to understand and balance trade-offs between power, performance, and area. Familiar with developing RTL using Verilog, System Verilog, or VHDL. Knowledge of Physical Implementation flow from RTL through Synthesis, Place & Route to STA. "Nice To Have" Skills and Experience : A background in development based on Arm processor based SoC system designs. A Bachelor's (BS), Master's (MS/MSc), or equivalent degree in Electronics, Electrical, or Computer Engineering. Candidates with other degrees will be considered if they have relevant work experience. Development or analysis of CPU or Graphics benchmarks for PPA analysis. Experience using tools for power analysis, power delivery and signoff. (e.g. PowerPro, PrimePower, Redhawk, etc) Background in running simulation/emulation tools. (e.g. VCS, Questasim, Incisive, Veloce Strato, Palladium, Zebu, etc) Good understanding of the concepts and tools related to synthesis, place & route, clock tree synthesis, constraint development, timing closure. (e.g. Innovus, Tempus, etc) In Return: We are proud to have a set of behaviors that reflect our culture and guide our decisions, defining how we work together. These behaviors are assessed as part of the hiring process: Partner and customer focus Teamwork and communication Creativity and innovation Team and personal development Impact and influence Deliver on your promises
Cirrus Logic International Semiconductor Ltd. is recruiting for a Design Verification Engineer in Austin, TX. Full-time schedule. Employees are generally expected to be available 8am-5pm Mon-Fri, but some flexibility is permitted. Three openings are available. Duties include: Functional verification of mixed-signal integrated circuits; verification planning, testbench development, failure analysis and resolution, coverage analysis and population, digital/mixed-signal modeling, directed/constraint-random test generation, and flow development; work closely with digital/analog designers, applications engineers and manufacturing test to support both pre-silicon verification and post silicon validation efforts. The job requires a Master of Science in Electrical Engineering or foreign educational equivalent or closely-related field. In addition, the position duties require the ability to develop layered testbench in SystemVerilog to verify digital designs; to perform formal verification at IP/Sub-System level; and to develop simulation and/or emulation models of mixed signal designs. Applicants with any suitable combination of education, training, and experience are acceptable. The salary for the position is $145,000 per year. Group health insurance, short term disability insurance, and 401k plan are offered. To apply for this position, please submit your resume to Recruitment and Employment Office CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. Attn: Job Ref #: CIR79906 P.O. Box 56625 Atlanta, GA 30343
09/13/2021
Full time
Cirrus Logic International Semiconductor Ltd. is recruiting for a Design Verification Engineer in Austin, TX. Full-time schedule. Employees are generally expected to be available 8am-5pm Mon-Fri, but some flexibility is permitted. Three openings are available. Duties include: Functional verification of mixed-signal integrated circuits; verification planning, testbench development, failure analysis and resolution, coverage analysis and population, digital/mixed-signal modeling, directed/constraint-random test generation, and flow development; work closely with digital/analog designers, applications engineers and manufacturing test to support both pre-silicon verification and post silicon validation efforts. The job requires a Master of Science in Electrical Engineering or foreign educational equivalent or closely-related field. In addition, the position duties require the ability to develop layered testbench in SystemVerilog to verify digital designs; to perform formal verification at IP/Sub-System level; and to develop simulation and/or emulation models of mixed signal designs. Applicants with any suitable combination of education, training, and experience are acceptable. The salary for the position is $145,000 per year. Group health insurance, short term disability insurance, and 401k plan are offered. To apply for this position, please submit your resume to Recruitment and Employment Office CIRRUS LOGIC INTERNATIONAL SEMICONDUCTOR LTD. Attn: Job Ref #: CIR79906 P.O. Box 56625 Atlanta, GA 30343
At Cirrus Logic, mixed-signal engineering drives our company. We develop high-performance, low-power signal processing solutions in audio, voice and haptics, delivering innovative end-user experiences and solving difficult challenges for new generations of mobile and consumer devices. While breaking the innovation barrier, we've also built an award-winning company culture, thanks to our extraordinary workforce and our ongoing efforts to champion and promote diversity, as well as our principles of equality and fairness in the workplace. Do you enjoy working alongside the industry's top engineers and solving sophisticated challenges for the world's top consumer brands? Join our team and help us continue to make this an exceptional place to work!The Post-Silicon Project Manager at Cirrus Logic works closely with multi-functional teams, leading project management of post-silicon development activities from initial silicon bring-up to production release and beyond! Performing end-to-end project planning, meticulous tracking and delivery of groundbreaking mixed-signal audio products will be your challenge!ResponsibilitiesLead projects for mixed-signal audio products by working with multi-functional silicon development teams to meet internal and external customer commitmentsResponsible for complete project planning and detailed execution to improve project successDrive accountability and awareness, resolve problems, remove roadblocks, and actively seek out and address risks or weaknesses to ensure the project meets quality standards and completes on time and within budgetRepresent the collective engineering team in collaborating with Product Marketing or the customerEnable communication & clarity to ensure alignment at all levels of the organizationDevelopment & deployment of methodologies to improve program performance, efficiency, and produce repeatable resultsChampion lessons learned to drive continuous improvement & avoid known problems.Required Skills and QualificationsBachelor's degree in Electrical Engineering/Computer Engineering, Computer Science, or a related field requiredMinimum 3 years in project management with an IC manufacturer or silicon environmentExcellent communication and interpersonal skillsBasic knowledge of post-silicon validation, characterization, and qualification for mixed-signal IC productsStrong project management fundamentalsPreferred Skills and QualificationsFamiliar with project/program management tools such as MS Project3+ years of project management experience leading post-silicon activities for sophisticated integrated circuit development projectsExperience with product development cycles (concept to production)This position is located in Austin, TXCirrus Logic is an Equal Opportunity/Affirmative Action Employer. We strive to select the best qualified applicant for any opening and to reward employees based on their skills, experience and performance. We do not discriminate on the basis of race, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, genetic information or any other characteristic protected by law.
09/03/2021
Full time
At Cirrus Logic, mixed-signal engineering drives our company. We develop high-performance, low-power signal processing solutions in audio, voice and haptics, delivering innovative end-user experiences and solving difficult challenges for new generations of mobile and consumer devices. While breaking the innovation barrier, we've also built an award-winning company culture, thanks to our extraordinary workforce and our ongoing efforts to champion and promote diversity, as well as our principles of equality and fairness in the workplace. Do you enjoy working alongside the industry's top engineers and solving sophisticated challenges for the world's top consumer brands? Join our team and help us continue to make this an exceptional place to work!The Post-Silicon Project Manager at Cirrus Logic works closely with multi-functional teams, leading project management of post-silicon development activities from initial silicon bring-up to production release and beyond! Performing end-to-end project planning, meticulous tracking and delivery of groundbreaking mixed-signal audio products will be your challenge!ResponsibilitiesLead projects for mixed-signal audio products by working with multi-functional silicon development teams to meet internal and external customer commitmentsResponsible for complete project planning and detailed execution to improve project successDrive accountability and awareness, resolve problems, remove roadblocks, and actively seek out and address risks or weaknesses to ensure the project meets quality standards and completes on time and within budgetRepresent the collective engineering team in collaborating with Product Marketing or the customerEnable communication & clarity to ensure alignment at all levels of the organizationDevelopment & deployment of methodologies to improve program performance, efficiency, and produce repeatable resultsChampion lessons learned to drive continuous improvement & avoid known problems.Required Skills and QualificationsBachelor's degree in Electrical Engineering/Computer Engineering, Computer Science, or a related field requiredMinimum 3 years in project management with an IC manufacturer or silicon environmentExcellent communication and interpersonal skillsBasic knowledge of post-silicon validation, characterization, and qualification for mixed-signal IC productsStrong project management fundamentalsPreferred Skills and QualificationsFamiliar with project/program management tools such as MS Project3+ years of project management experience leading post-silicon activities for sophisticated integrated circuit development projectsExperience with product development cycles (concept to production)This position is located in Austin, TXCirrus Logic is an Equal Opportunity/Affirmative Action Employer. We strive to select the best qualified applicant for any opening and to reward employees based on their skills, experience and performance. We do not discriminate on the basis of race, national origin, pregnancy status, marital status, gender, age, religion, physical or mental disability, medical condition, veteran status, sexual orientation, genetic information or any other characteristic protected by law.
Minimum Required Skills: optical testing, Engineering Validation Test (EVT/DVT), Integrated Circuit (IC) Testing, Optical Transceiver Testing, High-Speed (50Gbps PAM4), Fiber-Optic Component Testing, Silicon Photonics Testing If you are a Principal Validation Test Engineer with Photonics experience, please read on! Job Title: Principal Validation Test Engineer - Photonics Job Location: Pasadena, CA - Relocation assistance offered! Compensation: $140K - $200K+ base DOE Our company's core technology platform was developed with a total focus on high volume manufacture of highly integrated optical/electronic devices. Our large waveguide photonics platform offers multiple benefits over conventional solutions. These benefits include higher density waveguide circuit design, better manufacturing tolerance, superior optical power handling, and a more efficient interface from the photonics IC to the physical domain. Our company's technology simplifies the manufacturing, assembly, and test process while maximizing the power efficiency of the optical system. Over half of our team holds advanced technical degrees (M.Sc and PhD) and it includes world recognized experts in photonics process development, photonics device design and modeling, high speed CMOS mixed signal circuits, optical circuit switching, optical sensing and measurement systems, and network systems architecture. Our business leaders have amassed a spectacular track record including in multiple photonics start-ups with impressive investor returns, in growing high volume optical manufacturing at scale, and in forging market-leading communications semiconductor product lines. Together, the team is driving a vision for pervasive silicon photonics across a broad range of high volume applications. Top Reasons to Work with Us 1) Competitive Compensation ($140K - $200K+ base Depending on Experience) 2) Comprehensive Benefits package including equity and relocation assistance! 3) The chance to join a rapidly growing well funded late-stage Silicon Photonics start-up with huge upside potential! What You Will Be Doing We are seeking best-in-class professionals to join our dynamic and innovative team. Candidates must have excellent written and oral communication skills, work well independently and in a team environment, and thrive on the challenges that come from working in a fast-paced start-up. - Setup and maintain complex test environments and automated setups; - Support and qualify system test infrastructure and automated test software; - Analyze test data, generate EVT/DVT reports, hold review meetings with relevant stakeholders and make recommendations; - Work with cross-functional teams, help define EVT/DVT test plans; - Support the adaptation of equipment from design verification environment to high-volume manufacturing test platforms; - Debug IC / system level issues and able to provide short term and long-term solution - Prepare the test plan and execute EVT and DVT over PVT corners cases; - Able to isolate the issues between the test setup and DUT; - Help test engineers and FW engineers for test automation setup; What You Need for this Position Must have a BS / MS in Electrical Engineering or similar with 5+ years experience/knowledge of the following: - Hands-on experience in optical and electrical testing of photonic systems and sub-systems; - Must have experience with debug and Failure analysis methodologies; - Must have Optical and Electrical high speed (50Gbps PAM4) testing experience.; - PCB design experience preferred; - Familiar with optical setups and electronic test equipment; - Familiar with working and handling fiber-optic components; - Ability to work independently as well as effectively with a team, with engineers from varying disciplines; - Have good time management skills and is self-motivated; have a strong desire to succeed in a fast-paced and challenging environment; - Have strong oral communication and interpersonal skills; - Company-wide Values: Customers, Results, Innovation, Excellence and Teamwork What's In It for You - We are the best in the business and we will do what it takes to get like-minded folks on board! - High Salaries and bonuses - Flexible work environment, flex hours and day - Our Equity offering is extremely competitive, we are looking for candidates who are interested in taking a vested interest in our success, and we are more than willing to share the rewards of that success with them! - We offer a stimulating and innovative work environmentSo, if you are a Principal Validation Test Engineer with Photonics experience, please apply today! or send an updated copy of your resume to for immediate consideration! Applicants must be authorized to work in the U.S.Please apply directly to by clicking 'Click Here to Apply' with your Word resume! Looking forward to receiving your resume and going over the position in more detail with you. - Not a fit for this position? Click the link at the bottom of this email to search all of our open positions. Looking forward to receiving your resume! CyberCoders CyberCoders, Inc is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law. Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance. Copyright 1999 - 2020 . CyberCoders, Inc. All rights reserved. - provided by Dice
10/02/2020
Full time
Minimum Required Skills: optical testing, Engineering Validation Test (EVT/DVT), Integrated Circuit (IC) Testing, Optical Transceiver Testing, High-Speed (50Gbps PAM4), Fiber-Optic Component Testing, Silicon Photonics Testing If you are a Principal Validation Test Engineer with Photonics experience, please read on! Job Title: Principal Validation Test Engineer - Photonics Job Location: Pasadena, CA - Relocation assistance offered! Compensation: $140K - $200K+ base DOE Our company's core technology platform was developed with a total focus on high volume manufacture of highly integrated optical/electronic devices. Our large waveguide photonics platform offers multiple benefits over conventional solutions. These benefits include higher density waveguide circuit design, better manufacturing tolerance, superior optical power handling, and a more efficient interface from the photonics IC to the physical domain. Our company's technology simplifies the manufacturing, assembly, and test process while maximizing the power efficiency of the optical system. Over half of our team holds advanced technical degrees (M.Sc and PhD) and it includes world recognized experts in photonics process development, photonics device design and modeling, high speed CMOS mixed signal circuits, optical circuit switching, optical sensing and measurement systems, and network systems architecture. Our business leaders have amassed a spectacular track record including in multiple photonics start-ups with impressive investor returns, in growing high volume optical manufacturing at scale, and in forging market-leading communications semiconductor product lines. Together, the team is driving a vision for pervasive silicon photonics across a broad range of high volume applications. Top Reasons to Work with Us 1) Competitive Compensation ($140K - $200K+ base Depending on Experience) 2) Comprehensive Benefits package including equity and relocation assistance! 3) The chance to join a rapidly growing well funded late-stage Silicon Photonics start-up with huge upside potential! What You Will Be Doing We are seeking best-in-class professionals to join our dynamic and innovative team. Candidates must have excellent written and oral communication skills, work well independently and in a team environment, and thrive on the challenges that come from working in a fast-paced start-up. - Setup and maintain complex test environments and automated setups; - Support and qualify system test infrastructure and automated test software; - Analyze test data, generate EVT/DVT reports, hold review meetings with relevant stakeholders and make recommendations; - Work with cross-functional teams, help define EVT/DVT test plans; - Support the adaptation of equipment from design verification environment to high-volume manufacturing test platforms; - Debug IC / system level issues and able to provide short term and long-term solution - Prepare the test plan and execute EVT and DVT over PVT corners cases; - Able to isolate the issues between the test setup and DUT; - Help test engineers and FW engineers for test automation setup; What You Need for this Position Must have a BS / MS in Electrical Engineering or similar with 5+ years experience/knowledge of the following: - Hands-on experience in optical and electrical testing of photonic systems and sub-systems; - Must have experience with debug and Failure analysis methodologies; - Must have Optical and Electrical high speed (50Gbps PAM4) testing experience.; - PCB design experience preferred; - Familiar with optical setups and electronic test equipment; - Familiar with working and handling fiber-optic components; - Ability to work independently as well as effectively with a team, with engineers from varying disciplines; - Have good time management skills and is self-motivated; have a strong desire to succeed in a fast-paced and challenging environment; - Have strong oral communication and interpersonal skills; - Company-wide Values: Customers, Results, Innovation, Excellence and Teamwork What's In It for You - We are the best in the business and we will do what it takes to get like-minded folks on board! - High Salaries and bonuses - Flexible work environment, flex hours and day - Our Equity offering is extremely competitive, we are looking for candidates who are interested in taking a vested interest in our success, and we are more than willing to share the rewards of that success with them! - We offer a stimulating and innovative work environmentSo, if you are a Principal Validation Test Engineer with Photonics experience, please apply today! or send an updated copy of your resume to for immediate consideration! Applicants must be authorized to work in the U.S.Please apply directly to by clicking 'Click Here to Apply' with your Word resume! Looking forward to receiving your resume and going over the position in more detail with you. - Not a fit for this position? Click the link at the bottom of this email to search all of our open positions. Looking forward to receiving your resume! CyberCoders CyberCoders, Inc is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law. Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance. Copyright 1999 - 2020 . CyberCoders, Inc. All rights reserved. - provided by Dice
Post Silicon Validation Engineer THE ROLE: Technical, hands-on engineer responsible for Datacenter Server SoC Post-Silicon features validation and enablement at the silicon SoC level up through BIOS, system firmware, and OS levels on AMD Server products. This individual will be primarily responsible for interfacing with silicon, firmware, and platform design groups to develop and execute validation test plans for Datacenter Server SoC products during emulation and post-silicon bring-up / validation, to debug SoC feature issues, and to run and maintain validation infrastructure. KEY RESPONSIBILITIES: • Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products • Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup) • Test interactions between various SoC features using validation infrastructure • Debug and drive root-cause analysis for Security related issues • Collaborate with cross-functional teams in developing tools to improve SoC validation and debug • Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process REQUIRED EXPERIENCE: • Experience with PC architecture and microprocessor cores • Understanding of modern x86 microprocessor architecture and Server platform architecture is highly desired • Experience developing validation methodologies and infrastructure • Test plan and test development experience • Participated in silicon bring up and debug, support to internal engineering teams • Able to execute and drive success of programs with multiple projects on the go • Debug skills at both SoC and system level • Familiarity with programming / scripting language (C/C++, Python, Perl, ...) • Working knowledge of Server OSes (Linux, Windows) • Must be a self-starting team player with excellent communication skills who can work with minimal guidance • Forward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement • Strong verbal and written English communication skills PREFERRED EXPERIENCE: • Working knowledge of lab equipment such as oscilloscopes, logic analyzers and protocol analyzers • Hypervisor experience is a plus with regards to security encryption in virtualized environments • Self-organizing and the ability multitask based on priorities ACADEMIC CREDENTIALS: • Bachelor's degree or higher in Electrical/Computer Engineering or Electronics / Computer Science related with a minimum 2-5 years of experience in SoC validation and debug. Due to federal security clearance requirements, applicant must be a United States Citizen or Permanent Resident We cannot sponsor candidates ! - provided by Dice
10/01/2020
Full time
Post Silicon Validation Engineer THE ROLE: Technical, hands-on engineer responsible for Datacenter Server SoC Post-Silicon features validation and enablement at the silicon SoC level up through BIOS, system firmware, and OS levels on AMD Server products. This individual will be primarily responsible for interfacing with silicon, firmware, and platform design groups to develop and execute validation test plans for Datacenter Server SoC products during emulation and post-silicon bring-up / validation, to debug SoC feature issues, and to run and maintain validation infrastructure. KEY RESPONSIBILITIES: • Develop and execute feature enablement and validation test plans for SoC- and system-level SoC features across all AMD Server products • Develop post-silicon validation infrastructure (software, hardware, automation environment, and lab setup) • Test interactions between various SoC features using validation infrastructure • Debug and drive root-cause analysis for Security related issues • Collaborate with cross-functional teams in developing tools to improve SoC validation and debug • Work with cross-functional teams to improve post-silicon validation test strategy, methodology, and process REQUIRED EXPERIENCE: • Experience with PC architecture and microprocessor cores • Understanding of modern x86 microprocessor architecture and Server platform architecture is highly desired • Experience developing validation methodologies and infrastructure • Test plan and test development experience • Participated in silicon bring up and debug, support to internal engineering teams • Able to execute and drive success of programs with multiple projects on the go • Debug skills at both SoC and system level • Familiarity with programming / scripting language (C/C++, Python, Perl, ...) • Working knowledge of Server OSes (Linux, Windows) • Must be a self-starting team player with excellent communication skills who can work with minimal guidance • Forward thinker that drives improvement to development process, code architecture and fosters a spirit of innovation and continuous improvement • Strong verbal and written English communication skills PREFERRED EXPERIENCE: • Working knowledge of lab equipment such as oscilloscopes, logic analyzers and protocol analyzers • Hypervisor experience is a plus with regards to security encryption in virtualized environments • Self-organizing and the ability multitask based on priorities ACADEMIC CREDENTIALS: • Bachelor's degree or higher in Electrical/Computer Engineering or Electronics / Computer Science related with a minimum 2-5 years of experience in SoC validation and debug. Due to federal security clearance requirements, applicant must be a United States Citizen or Permanent Resident We cannot sponsor candidates ! - provided by Dice
Digital Validation engineer 6+ Months Contract Sunnyvale, CA Job Description Our Client is looking for someone with validation experience, either bringing up silicon or validating silicon. They need to be able to write tests (whatever language but MATLAB preferred)Digital design or verification experience, signal processing is a plus Silicon bringup/validation experience Digital design experience (support role which will have person take existing RTL/microarchitecture and bug fix) Experience with scripting Domain knowledge in signal processing a big plus Ability to write reference models in C/C++ Self sufficient - Able to problem solve on their own and ask the right questions - provided by Dice
10/01/2020
Full time
Digital Validation engineer 6+ Months Contract Sunnyvale, CA Job Description Our Client is looking for someone with validation experience, either bringing up silicon or validating silicon. They need to be able to write tests (whatever language but MATLAB preferred)Digital design or verification experience, signal processing is a plus Silicon bringup/validation experience Digital design experience (support role which will have person take existing RTL/microarchitecture and bug fix) Experience with scripting Domain knowledge in signal processing a big plus Ability to write reference models in C/C++ Self sufficient - Able to problem solve on their own and ask the right questions - provided by Dice
Minimum Required Skills: Quality Assurance Manager, Medical Device, Quality System Management (21 CFR 820), ISO 13485, ISO 14971, IEC 62304, IEC 60601, Ultrasound or Similar Diagnostic Device If you are a Quality Assurance Manager with Ultrasound or similar Medical Device experience, please read on! Job Title: Quality Assurance Manager - Ultrasound Medical Device Job Location: Redwood City, CA Compensation: $140K - $175K base DOE plus bonus and stock options! Our company is developing a low cost, handheld, point and shoot, medical imager that can be used in a variety of medical settings ranging from point of care to trauma to bedside applications. Our imager will allow doctors, nurses, first responders, and other medical professionals to perform ad hoc imaging procedures in a number of situations from needle guidance to performing a full heart examination to looking for plaque build up in arteries. We were founded in 2015 by serial entrepreneurs with over 10 exits. We are a Silicon Valley company melding cutting edge material science, semiconductor technologies, advanced signal processing and AI to enable low cost imaging. Our goal is to develop an ultrasound platform to bring medical imaging to 5.5 billion people around the world who have no access. We will change the imaging and therapeutic markets by reducing cost and increasing access and immediacy. Our 3D broadband ultrasound platform will proliferate into numerous new applications ranging from tomography, endoscopy, ultrasound patches, tissue ablation, precision surgery, targeted drug delivery and pain management. We just received a substantial Series B round of funding led by Intel & Applied Ventures and we are now rapidly expanding! Top Reasons to Work with Us 1) Competitive Compensation ($140K - $175K base depending on experience) 2) Comprehensive Benefits Package including incentive bonus and stock options! 3) The chance to join the core team of a well-funded rapidly growing start-up! 4) Help expand medical imaging access to people who need it the most! What You Will Be Doing - Develop and maintain our Quality System in compliance with all applicable regulatory requirements (ex. 21 CFR 820, ISO 13485, CMDR etc) - Writes and/or implements changes to controlled documents (e.g., SOPs, specifications, methods, etc.) as needed to ensure defined quality objectives are met - Oversees Document Control processes, including regulatory standards updates and validation of electronic QMS systems - Serves as a lead/coordinator of investigations and corrective and preventive actions (CAPA) - Oversees the Complaint Reporting and Post Market Surveillance Systems - Coordinates Internal Audits and ensures implementation of audit feed-back - Leads Medical Device Regulations (EU) implementation efforts - Oversees Supplier Management process, from initial sourcing through development and commercial phases as well as sustaining supplier activities. May conduct supplier audits as required - Oversees employee training program - Monitor, track/trend all KPI and periodically provide a summary report to senior management, including participation in Management Review meetings - Represent the company as a Quality Assurance subject matter expert during internal and external regulatory inspections - Work effectively and influence multiple functions (R&D, Operations, Program Management, Regulatory, Supply Chain etc.) to ensure Quality expectations are met - Provide coaching to other personnel on Quality Systems requirements and process improvement methodologies What You Need for this Position BS degree with 8+ years of experience in the Medical Device industry including the following: - 3+ years of direct managerial responsibility leading aspects of Quality System for Medical Devices - Exceptional working knowledge and understanding of Quality System regulations (21CFR 820 and ISO 13485), Risk Assessment (ISO 14971), requirements related to software (IEC 62304) - Certification by ASQ (Certified Quality Auditor, Certified Quality Engineer, and Certified Quality Manager) or other industry-recognized professional organizations is preferred. - Superior time management skills, ability to work on several projects simultaneously and excellent communication skills required. - Available to travel up to 10% of the time (once Covid travel restrictions lift)So, if you are a Quality Assurance Manager with Ultrasound or similar Medical Device experience, please apply today! or send an updated copy of your resume to for immediate consideration! Applicants must be authorized to work in the U.S.Please apply directly to by clicking 'Click Here to Apply' with your Word resume! Looking forward to receiving your resume and going over the position in more detail with you. - Not a fit for this position? Click the link at the bottom of this email to search all of our open positions. Looking forward to receiving your resume! CyberCoders CyberCoders, Inc is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law. Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire. Copyright 1999 - 2020 . CyberCoders, Inc. All rights reserved. - provided by Dice
10/01/2020
Full time
Minimum Required Skills: Quality Assurance Manager, Medical Device, Quality System Management (21 CFR 820), ISO 13485, ISO 14971, IEC 62304, IEC 60601, Ultrasound or Similar Diagnostic Device If you are a Quality Assurance Manager with Ultrasound or similar Medical Device experience, please read on! Job Title: Quality Assurance Manager - Ultrasound Medical Device Job Location: Redwood City, CA Compensation: $140K - $175K base DOE plus bonus and stock options! Our company is developing a low cost, handheld, point and shoot, medical imager that can be used in a variety of medical settings ranging from point of care to trauma to bedside applications. Our imager will allow doctors, nurses, first responders, and other medical professionals to perform ad hoc imaging procedures in a number of situations from needle guidance to performing a full heart examination to looking for plaque build up in arteries. We were founded in 2015 by serial entrepreneurs with over 10 exits. We are a Silicon Valley company melding cutting edge material science, semiconductor technologies, advanced signal processing and AI to enable low cost imaging. Our goal is to develop an ultrasound platform to bring medical imaging to 5.5 billion people around the world who have no access. We will change the imaging and therapeutic markets by reducing cost and increasing access and immediacy. Our 3D broadband ultrasound platform will proliferate into numerous new applications ranging from tomography, endoscopy, ultrasound patches, tissue ablation, precision surgery, targeted drug delivery and pain management. We just received a substantial Series B round of funding led by Intel & Applied Ventures and we are now rapidly expanding! Top Reasons to Work with Us 1) Competitive Compensation ($140K - $175K base depending on experience) 2) Comprehensive Benefits Package including incentive bonus and stock options! 3) The chance to join the core team of a well-funded rapidly growing start-up! 4) Help expand medical imaging access to people who need it the most! What You Will Be Doing - Develop and maintain our Quality System in compliance with all applicable regulatory requirements (ex. 21 CFR 820, ISO 13485, CMDR etc) - Writes and/or implements changes to controlled documents (e.g., SOPs, specifications, methods, etc.) as needed to ensure defined quality objectives are met - Oversees Document Control processes, including regulatory standards updates and validation of electronic QMS systems - Serves as a lead/coordinator of investigations and corrective and preventive actions (CAPA) - Oversees the Complaint Reporting and Post Market Surveillance Systems - Coordinates Internal Audits and ensures implementation of audit feed-back - Leads Medical Device Regulations (EU) implementation efforts - Oversees Supplier Management process, from initial sourcing through development and commercial phases as well as sustaining supplier activities. May conduct supplier audits as required - Oversees employee training program - Monitor, track/trend all KPI and periodically provide a summary report to senior management, including participation in Management Review meetings - Represent the company as a Quality Assurance subject matter expert during internal and external regulatory inspections - Work effectively and influence multiple functions (R&D, Operations, Program Management, Regulatory, Supply Chain etc.) to ensure Quality expectations are met - Provide coaching to other personnel on Quality Systems requirements and process improvement methodologies What You Need for this Position BS degree with 8+ years of experience in the Medical Device industry including the following: - 3+ years of direct managerial responsibility leading aspects of Quality System for Medical Devices - Exceptional working knowledge and understanding of Quality System regulations (21CFR 820 and ISO 13485), Risk Assessment (ISO 14971), requirements related to software (IEC 62304) - Certification by ASQ (Certified Quality Auditor, Certified Quality Engineer, and Certified Quality Manager) or other industry-recognized professional organizations is preferred. - Superior time management skills, ability to work on several projects simultaneously and excellent communication skills required. - Available to travel up to 10% of the time (once Covid travel restrictions lift)So, if you are a Quality Assurance Manager with Ultrasound or similar Medical Device experience, please apply today! or send an updated copy of your resume to for immediate consideration! Applicants must be authorized to work in the U.S.Please apply directly to by clicking 'Click Here to Apply' with your Word resume! Looking forward to receiving your resume and going over the position in more detail with you. - Not a fit for this position? Click the link at the bottom of this email to search all of our open positions. Looking forward to receiving your resume! CyberCoders CyberCoders, Inc is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law. Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire. Copyright 1999 - 2020 . CyberCoders, Inc. All rights reserved. - provided by Dice
Email Resumes to: Title: Engineering Program Specialist Location: Menlo Park, CA (Remote) Contract Length: 11 month (Peak Period) Pay Rate: $56.50/HR Top Skills: NPI, Excel, Detail Oriented Duties: Management of silicon material validation plans in reference for silicon New Product Introduction (NPI) phase Host, attend and present at various meetings. Report and implement delivery schedules, materials and build matrix details Track wafers as they flow from the foundry through to downstream teams. Drive vendors to deliver the requested material in a timely manner. Handle and rebound from critical issues that might stem from Engineering change, material shortage or schedule slips. Anticipate potential issues that may arise and communicate to relevant teams to jump-start mitigation paths. Skills: Experience managing, prioritizing and maintaining multiple projects and teams at a time. Very detail oriented to ensure accuracy of all data, status and reports. Excellent communication; both written and verbal. Experience with overseas vendors. A Self-starter who can function with ambiguity Experience with MS-excel/google sheets a plus. Education: Bachelors degree or 2+ years of shown experience. Silicon material management experience a plus. Experience managing, prioritizing and maintaining multiple projects at a time. EEO Employer Apex Systems is an equal opportunity employer. We do not discriminate or allow discrimination on the basis of race, color, religion, creed, sex (including pregnancy, childbirth, breastfeeding, or related medical conditions), age, sexual orientation, gender identity, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, disability, status as a crime victim, protected veteran status, political affiliation, union membership, or any other characteristic protected by law. Apex will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable law. If you have visited our website in search of information on employment opportunities or to apply for a position, and you require an accommodation in using our website for a search or application, please contact our Employee Services Department at or - provided by Dice
10/01/2020
Full time
Email Resumes to: Title: Engineering Program Specialist Location: Menlo Park, CA (Remote) Contract Length: 11 month (Peak Period) Pay Rate: $56.50/HR Top Skills: NPI, Excel, Detail Oriented Duties: Management of silicon material validation plans in reference for silicon New Product Introduction (NPI) phase Host, attend and present at various meetings. Report and implement delivery schedules, materials and build matrix details Track wafers as they flow from the foundry through to downstream teams. Drive vendors to deliver the requested material in a timely manner. Handle and rebound from critical issues that might stem from Engineering change, material shortage or schedule slips. Anticipate potential issues that may arise and communicate to relevant teams to jump-start mitigation paths. Skills: Experience managing, prioritizing and maintaining multiple projects and teams at a time. Very detail oriented to ensure accuracy of all data, status and reports. Excellent communication; both written and verbal. Experience with overseas vendors. A Self-starter who can function with ambiguity Experience with MS-excel/google sheets a plus. Education: Bachelors degree or 2+ years of shown experience. Silicon material management experience a plus. Experience managing, prioritizing and maintaining multiple projects at a time. EEO Employer Apex Systems is an equal opportunity employer. We do not discriminate or allow discrimination on the basis of race, color, religion, creed, sex (including pregnancy, childbirth, breastfeeding, or related medical conditions), age, sexual orientation, gender identity, national origin, ancestry, citizenship, genetic information, registered domestic partner status, marital status, disability, status as a crime victim, protected veteran status, political affiliation, union membership, or any other characteristic protected by law. Apex will consider qualified applicants with criminal histories in a manner consistent with the requirements of applicable law. If you have visited our website in search of information on employment opportunities or to apply for a position, and you require an accommodation in using our website for a search or application, please contact our Employee Services Department at or - provided by Dice
Minimum Required Skills: Photonic Integrated Circuit (PIC) Design, Photonic System Design, Optical Physics, Device Design, Optical Design Tools (RSoft/Lumerical/PhotonD), Photonics Layout Tools, Sensors If you are a Sr. Systems Design Engineer with Photonic Sensors experience, please read on! Job Title: Sr. Systems Design Engineer - Photonics, Sensors Job Location: Pasadena, CA - Relocation assistance offered! Compensation: $150K - $200K+ base Depending on Experience Our company's core technology platform was developed with a total focus on high volume manufacture of highly integrated optical/electronic devices. Our large waveguide photonics platform offers multiple benefits over conventional solutions. These benefits include higher density waveguide circuit design, better manufacturing tolerance, superior optical power handling, and a more efficient interface from the photonics IC to the physical domain. Our company's technology simplifies the manufacturing, assembly, and test process while maximizing the power efficiency of the optical system. Over half of our team holds advanced technical degrees (M.Sc and PhD) and it includes world recognized experts in photonics process development, photonics device design and modeling, high speed CMOS mixed signal circuits, optical circuit switching, optical sensing and measurement systems, and network systems architecture. Our business leaders have amassed a spectacular track record including in multiple photonics start-ups with impressive investor returns, in growing high volume optical manufacturing at scale, and in forging market-leading communications semiconductor product lines. Together, the team is driving a vision for pervasive silicon photonics across a broad range of high volume applications. Top Reasons to Work with Us 1) Competitive Compensation ($150K - $200K+ base Depending on Experience) 2) Comprehensive Benefits package including equity and relocation assistance! 3) The chance to join a rapidly growing well funded late-stage Silicon Photonics start-up with huge upside potential! What You Will Be Doing The Senior Systems Design Engineer will be responsible for the design of Photonic integrated circuits supporting system architectures for sensing applications. The Senior Systems Design Engineer will work closely with cross-functional teams including Photonic Integrated Circuit (PIC) design, electrical IC, packaging, validation, fabrication, and sensors teams to ensure and validate designs comply with system-level and application requirements. - Design Photonic integrated circuits meeting target specification; identify and communicate engineering tradeoffs supporting global systems-level architecture optimization - Analyze component performance within system level architectures; provide recommendations for component optimization - Assess component variability and sensitivity to process; support drive towards high-yield and stable component designs - Identify and communicate risks and drive closure and contingency planning; maintain FMEA - Communicate designs to layout and validate design intent - Analyze test and fab data; close gaps between measured and designed performance; hold review meetings with relevant stakeholders and make recommendations - Work closely with sensing systems engineer to create and execute on sensing technology roadmap that supports customer needs and is compatible with the our Silicon photonic platform What You Need for this Position MS (PhD Preferred) in Electrical Engineering, Physics or related field with 5+ years experience of the following: - Photonic system design and modeling - Extensive background in optical physics and device design - Working experience with optical design tools and optical circuit modeling tools such as RSoft, Lumerical, PhotonD - Experience with data or statistical analysis - Knowledge in Photonics layout tools and flows, semiconductor fabrication tools and methods - Knowledge in standard Photonics testingSo, if you are a Sr. Systems Design Engineer with Photonic Sensors experience, please apply today! or send an updated copy of your resume to for immediate consideration! Applicants must be authorized to work in the U.S.Please apply directly to by clicking 'Click Here to Apply' with your Word resume! Looking forward to receiving your resume and going over the position in more detail with you. - Not a fit for this position? Click the link at the bottom of this email to search all of our open positions. Looking forward to receiving your resume! CyberCoders CyberCoders, Inc is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law. Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance. Copyright 1999 - 2020 . CyberCoders, Inc. All rights reserved. - provided by Dice
09/29/2020
Full time
Minimum Required Skills: Photonic Integrated Circuit (PIC) Design, Photonic System Design, Optical Physics, Device Design, Optical Design Tools (RSoft/Lumerical/PhotonD), Photonics Layout Tools, Sensors If you are a Sr. Systems Design Engineer with Photonic Sensors experience, please read on! Job Title: Sr. Systems Design Engineer - Photonics, Sensors Job Location: Pasadena, CA - Relocation assistance offered! Compensation: $150K - $200K+ base Depending on Experience Our company's core technology platform was developed with a total focus on high volume manufacture of highly integrated optical/electronic devices. Our large waveguide photonics platform offers multiple benefits over conventional solutions. These benefits include higher density waveguide circuit design, better manufacturing tolerance, superior optical power handling, and a more efficient interface from the photonics IC to the physical domain. Our company's technology simplifies the manufacturing, assembly, and test process while maximizing the power efficiency of the optical system. Over half of our team holds advanced technical degrees (M.Sc and PhD) and it includes world recognized experts in photonics process development, photonics device design and modeling, high speed CMOS mixed signal circuits, optical circuit switching, optical sensing and measurement systems, and network systems architecture. Our business leaders have amassed a spectacular track record including in multiple photonics start-ups with impressive investor returns, in growing high volume optical manufacturing at scale, and in forging market-leading communications semiconductor product lines. Together, the team is driving a vision for pervasive silicon photonics across a broad range of high volume applications. Top Reasons to Work with Us 1) Competitive Compensation ($150K - $200K+ base Depending on Experience) 2) Comprehensive Benefits package including equity and relocation assistance! 3) The chance to join a rapidly growing well funded late-stage Silicon Photonics start-up with huge upside potential! What You Will Be Doing The Senior Systems Design Engineer will be responsible for the design of Photonic integrated circuits supporting system architectures for sensing applications. The Senior Systems Design Engineer will work closely with cross-functional teams including Photonic Integrated Circuit (PIC) design, electrical IC, packaging, validation, fabrication, and sensors teams to ensure and validate designs comply with system-level and application requirements. - Design Photonic integrated circuits meeting target specification; identify and communicate engineering tradeoffs supporting global systems-level architecture optimization - Analyze component performance within system level architectures; provide recommendations for component optimization - Assess component variability and sensitivity to process; support drive towards high-yield and stable component designs - Identify and communicate risks and drive closure and contingency planning; maintain FMEA - Communicate designs to layout and validate design intent - Analyze test and fab data; close gaps between measured and designed performance; hold review meetings with relevant stakeholders and make recommendations - Work closely with sensing systems engineer to create and execute on sensing technology roadmap that supports customer needs and is compatible with the our Silicon photonic platform What You Need for this Position MS (PhD Preferred) in Electrical Engineering, Physics or related field with 5+ years experience of the following: - Photonic system design and modeling - Extensive background in optical physics and device design - Working experience with optical design tools and optical circuit modeling tools such as RSoft, Lumerical, PhotonD - Experience with data or statistical analysis - Knowledge in Photonics layout tools and flows, semiconductor fabrication tools and methods - Knowledge in standard Photonics testingSo, if you are a Sr. Systems Design Engineer with Photonic Sensors experience, please apply today! or send an updated copy of your resume to for immediate consideration! Applicants must be authorized to work in the U.S.Please apply directly to by clicking 'Click Here to Apply' with your Word resume! Looking forward to receiving your resume and going over the position in more detail with you. - Not a fit for this position? Click the link at the bottom of this email to search all of our open positions. Looking forward to receiving your resume! CyberCoders CyberCoders, Inc is proud to be an Equal Opportunity Employer All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, disability, protected veteran status, or any other characteristic protected by law. Your Right to Work - In compliance with federal law, all persons hired will be required to verify identity and eligibility to work in the United States and to complete the required employment eligibility verification document form upon hire. CyberCoders will consider for Employment in the City of Los Angeles qualified Applicants with Criminal Histories in a manner consistent with the requirements of the Los Angeles Fair Chance Initiative for Hiring (Ban the Box) Ordinance. Copyright 1999 - 2020 . CyberCoders, Inc. All rights reserved. - provided by Dice
Systems Design Engineer - Graphics Silicon Validation Engineer - Junior THE ROLE: The Datacenter Graphics and Accelerated Computing Validation Team is looking for dynamic and energetic validation Engineers to join our growing team. As a key contributor to the success of AMD's IP, you will be part of a leading team to drive and enhance AMD's abilities to deliver the highest quality, industry leading technologies used for Datacenter, Machine Learning, and High Performance Computing. The team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: A self-starter with the ability to execute complex test plans independently, and collaborate with others to resolve problems found. You will have guidance from senior engineers familiar with the role, and should feel comfortable working in a lab environment. KEY RESPONSIBILITIES: As a validation engineer, you will drive the planning, validation, and debug of various hardware and software components of SoC for upcoming AMD products, while working with Silicon/IP design teams, key architects, software team and other validation team members Responsibilities include: • Define and execute end-to-end test plan and validation strategy for a group of AMD IP • Debug issues found during pre-silicon, bring-up, validation, and production phases of SOC programs • Lead collaborative test approach with multiple teams, and tracking test execution to make sure all features are validated and optimized on time • Develop knowledge of system architecture, technical debug, and validation strategy • Drive technical innovation to enhance AMD's capabilities in IP validation including tools and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives. • Work closely with supporting teams in design, diagnostics, emulation, firmware, and software to ensure readiness for first silicon arrival, enablement of IP functionality, and debug of critical features. • Support on customer platforms as requested by customer support teams. IDEAL CANDIDATE • Experience working on high speed I/O designs or validation • Demonstrated ability to execute complex tasks in Linux environment • Familiar with PC systems and components • Familiar with lab environments and equipment, such as oscilloscopes and logic analyzers, high speed I/O bus analyzer • Experience defining test plans and validation strategies • Ability to debug complex problems, especially with limited visibility to the DUT (black box) • Good communication skills, able to communicate across functions, teams, and geographies • Experience with system architecture, graphics/multimedia/high speed I/O protocols and specifications, PCB design/analysis, RTL design/verification, physical design, emulation, and DRAM technologies is a bonus • Basic Linux debug skill • Server platform validation skill is a plus. • Able to learn quickly • Scripting skills in Python a plus • Graphics experience a plus • Experience with High speed I/O lane margining tools a plus (such as PCIESIG tool) ACADEMIC CREDENTIALS: • Bachelors or Masters Degree in Electrical or Computer Engineering - provided by Dice
09/29/2020
Full time
Systems Design Engineer - Graphics Silicon Validation Engineer - Junior THE ROLE: The Datacenter Graphics and Accelerated Computing Validation Team is looking for dynamic and energetic validation Engineers to join our growing team. As a key contributor to the success of AMD's IP, you will be part of a leading team to drive and enhance AMD's abilities to deliver the highest quality, industry leading technologies used for Datacenter, Machine Learning, and High Performance Computing. The team fosters and encourages continuous technical innovation to showcase successes as well as facilitate continuous career development. THE PERSON: A self-starter with the ability to execute complex test plans independently, and collaborate with others to resolve problems found. You will have guidance from senior engineers familiar with the role, and should feel comfortable working in a lab environment. KEY RESPONSIBILITIES: As a validation engineer, you will drive the planning, validation, and debug of various hardware and software components of SoC for upcoming AMD products, while working with Silicon/IP design teams, key architects, software team and other validation team members Responsibilities include: • Define and execute end-to-end test plan and validation strategy for a group of AMD IP • Debug issues found during pre-silicon, bring-up, validation, and production phases of SOC programs • Lead collaborative test approach with multiple teams, and tracking test execution to make sure all features are validated and optimized on time • Develop knowledge of system architecture, technical debug, and validation strategy • Drive technical innovation to enhance AMD's capabilities in IP validation including tools and script development, technical and procedural methodology enhancement, and various internal and cross-functional technical initiatives. • Work closely with supporting teams in design, diagnostics, emulation, firmware, and software to ensure readiness for first silicon arrival, enablement of IP functionality, and debug of critical features. • Support on customer platforms as requested by customer support teams. IDEAL CANDIDATE • Experience working on high speed I/O designs or validation • Demonstrated ability to execute complex tasks in Linux environment • Familiar with PC systems and components • Familiar with lab environments and equipment, such as oscilloscopes and logic analyzers, high speed I/O bus analyzer • Experience defining test plans and validation strategies • Ability to debug complex problems, especially with limited visibility to the DUT (black box) • Good communication skills, able to communicate across functions, teams, and geographies • Experience with system architecture, graphics/multimedia/high speed I/O protocols and specifications, PCB design/analysis, RTL design/verification, physical design, emulation, and DRAM technologies is a bonus • Basic Linux debug skill • Server platform validation skill is a plus. • Able to learn quickly • Scripting skills in Python a plus • Graphics experience a plus • Experience with High speed I/O lane margining tools a plus (such as PCIESIG tool) ACADEMIC CREDENTIALS: • Bachelors or Masters Degree in Electrical or Computer Engineering - provided by Dice